#define N_CPU_REGS		32
#define N_CP0_REGS		255
#define N_FPU_REGS		32
#define N_FPU_CTL_REGS	32
#define N_CP2_REGS		32

struct register_file {
	sim_reg	cpu[N_CPU_REGS];		// General purpose registers
	sim_reg	cp0[N_CP0_REGS];		// CP0 registers
	sim_reg	fpu[N_FPU_REGS];		// FPU general purpose registers
	sim_reg	fpc[N_FPU_CTL_REGS];	// FPU control registers
	sim_reg	cp2[N_CP2_REGS];		// future expansion for CP2
	// No room for cp3, since we have an FPU!
};

#define REG_GET_BITS(r, m, s)		(((r) & (m)) >> (s))
#define REG_SET_BITS(r, m, s, v)	(((r) & ~(m)) | (((v) << (s)) & (m)))

